A photovoltaic structure generates electrical power by converting light into direct current electricity using semiconductor materials that exhibit the photovoltaic effect. The photovoltaic effect generates electrical power upon exposure to light as photons, packets of energy, are absorbed within the semiconductor material to excite electrons to a higher energy state, leaving behind an empty state (“hole”). These excited electrons and holes are thus able to conduct and move freely within the material.
A basic unit of photovoltaic structure, commonly called a cell, may generate only small scale electrical power. Thus, multiple cells may be electrically connected to aggregate the total power generated among the multiple cells within a larger integrated device, called a module, or a panel. A photovoltaic module may further comprise a protective back layer and encapsulant materials to protect the included cells from environmental factors. Multiple photovoltaic modules or panels can be assembled together to create a photovoltaic system, or array, capable of generating significant electrical power up to levels comparable to other types of utility-scale power plants. In addition to photovoltaic modules, a utility-scale array would further include mounting structures, electrical equipment including inverters, transformers, and other control systems. Considering various levels of device, from individual cell to utility-scale arrays containing a multitude of modules, all such implementations of the photovoltaic effect may contain one or more photovoltaic structures to accomplish the energy conversion.
To generate power from sunlight, the active area of a photovoltaic structure or device generally includes a junction of two distinct regions, one above the other and each containing one or more materials, where each material may further contain added impurities. The result is that one region in the photovoltaic device is n-type, having an excess of negatively charged electrons, while the other is p-type, having an excess of positively charged holes. In typical CdS/CdTe solar cells, these regions are commonly named the window layer, for the n-type CdS region, and the absorber layer, for the p-type CdTe region. These regions may be made of different materials, doped or not; or of the same material with dopants to create the p-type and n-type regions. Where these two regions abut one another, a p-n junction is formed. The window layer is preferred to be as thin as possible in order to allow the maximum amount of light to reach the absorber layer, yet it also needs to be sufficiently thick to maintain a robust p-n junction with the absorber layer and prevent shunting.
When photons create free electrons and holes, collectively called charge carriers, near the p-n junction, the internal electric field of the junction causes the electrons to move towards the n side of the junction and the holes towards the p side thereby generating an electrical charge potential. A front contact, electrically connected to the window layer, and a back contact, electrically connected to the absorber layer can provide pathways through which the electrical charge potential can flow to become an electrical current. Electrons can flow back to the p-side via an external current path, or circuit.
While moving within the semiconductor materials, the mobile electrons and holes may recombine—which reduces the total number of charge carriers available to generate current flow within the device and reduces the overall conversion efficiency. Efficiency refers to the electrical power or energy generated by the PV device compared to the equivalent energy of photons incident on the device. A key objective for manufacturing photovoltaic devices is to increase actual efficiencies obtained, to approximate the maximum or “entitlement” conversion efficiency.
An important issue in CdTe solar cell technology is the formation of an efficient and stable ohmic contact on the p-CdTe layer. But an ohmic contact on a p-type semiconductor is difficult to achieve for two main reasons: (1) because the crystalline structure and manufacturing processes of the absorber may leave a surface that is not completely compatible with a metal contact; and (2) because the work function of the metal contact should be higher that of the semiconductor material or a Schottky barrier may be formed. Prior to depositing or forming the back contact layer on the semiconductor layer of a photovoltaic device, it may be desirable to remove surface contamination from the semiconductor layer. Surface contamination includes oxidation of the semiconductor layer, adsorption of hydrocarbon and/or carbonates and/or other organic and inorganic contaminants on the semiconductor layer, for example. Contaminants formed on the semiconductor layer may adversely affect the interface between the semiconductor layer and the back contact layer. A poor interface between the semiconductor layer and the back contact layer may have an undesirable effect on the photovoltaic device, and specifically on Voc and Roc. Known methods of removing contaminants from the surface of the semiconductor layer may negatively affect grain boundaries and/or lattice structure of the crystals forming the semiconductor layer. It would be desirable to develop a more effective method to remove surface contaminants from a semiconductor layer and a photovoltaic device prior to depositing or forming a back contact layer to improve a performance of the photovoltaic device.
To avoid a Schottky barrier against a p-type CdTe absorber layer, a metal with a work function higher than 5.7 eV is needed, but metals having such high work functions are not readily available. To overcome this problem, a heavily doped p-CdTe surface is created with the help of chemical etching and a buffer layer of high carrier concentration is often applied. Subsequent post-deposition annealing diffuses some buffer material into the CdTe, where it changes the band edges as a result of change in the interface state density. The result is a lowering in interface barrier height and width, which enables a quasi-ohmic or tunneling contact between the metal and CdTe. Commonly used buffer layer/metallization combinations are Cu/Au, Cu/graphite, or graphite pastes doped with Hg and Cu. However, back-contacts containing Cu or other metal dopants are often not stable with time because the metals may diffuse or migrate from the back-contact to the CdTe layer, thereby causing degradation. Thus, there is a need to provide improved back contact layers to provide better interfaces, to minimize recombination of electron/hole pairs at the back contact, and to provide the desired power conversion efficiencies to make cost effective photovoltaic devices.
Therefore, it is desirable to provide an efficient p-n junction between layers of semiconductor materials, incorporating an absorber layer that can be cleaned and passivated, thereby increasing ohmic stability and efficiency.